Reliability and variability of semiconductor devices and integrated circuits are becoming major show-stoppers as the technology is scaled into the nanometer regime. To sustain continued technology scaling, physical understanding and scalable models are needed for innovative aging/variation-aware design paradigms for future circuits/systems that are designed with reliability/variability being taken into consideration. This symposium aims to provide an open forum for scientific exchange and latest developments ranging from atomic/quantum-level models to numerical/analytical/statistical device models for circuit/gate/system-level design and simulation.
Topics: - First-principle/atomic-level modeling of intrinsic device variability - Physics-based reliability models for circuit design and aging analysis - Statistical compact modeling and simulation for process variations - Numerical/analytical modeling of reliability/variability in emerging devices - Gate-level aging/variability modeling and simulation - Novel gate stack and dielectric reliability mechanisms - Hot carrier reliability, NBTI, and interface-trap modeling - ESD modeling/design approaches and CMOS latch-up - Electromigration physics and modeling - Advanced failure analysis techniques - Deterministic/probabilistic variations and noise in analog/digital systems - Novel probabilistic design approaches in the presence of variations/noise - New design paradigms and scalable EDA tools for reliability/variability - Aging/variation-aware circuit/logic/system design approaches - Reliability/variability characterization and measurement techniques - Test structures and design for reliability, variability, and yield - System-level and interconnect reliability/variability issues
A special issue for the Microelectronics Reliability journal will be arranged for selected papers of this symposium.
Call for Papers in the Special Issue of the Microelectronics Reliability Journal
All authors of invited and accepted papers can submit a full paper for publication in the scheduled special issue of Microelectronics Reliability (MR) published by Elsevier. See the attached Word file for the Guidelines for Authors: here
Important Dates: Submission deadline: August 15, 2011 Available of first review report: before October 14, 2011 First revision submission deadline: October 31, 2011 Final version submission deadline: December 31, 2011 Tentative publication date: March 2012.
If you have submitted to the MR journal before and already have an account, you will simply need to Log In. New users will need to Register first before the submission. Full instructions are available on the journal website: http://ees.elsevier.com/mr/. Note that you should assign your submission to the ICMAT Special Issue.
