Pinjala DAMARUGANATH, Institute of Microelectronics, Singapore
Liang Choo HSIA, Global Foundries Singapore Pte Ltd, Singapore
Co-Chairs
Chuan Seng TAN, Nanyang Technological University, Singapore
Gao SHAN, Institute of Microelectronics, Singapore
Philippe ROYANNEZ, Institute of Microelectronics, Singapore
Correspondence
Chuan Seng TAN, Nanyang Technological University, Singapore Email: TanCS@ntu.edu.sg Tel: 65-6790 5636 Fax: 65-6792 0415 Mailing Address: School of Electrical & Electronic Engineering Nanyang Technological University S2-B2c-85 50 Nanyang Avenue Singapore 639798
Scope of Symposium
Miniaturization, high performance, heterogeneous integration, and cost are key drivers for electronic integration and packaging research. 3D integration and packaging is emerging as a potential solution for meeting market demands. Though Silicon Via (TSV) is a key enabling technology for 3D integration/packaging and realization of high performance miniaturized products. The scope of the symposium covers materials, processes and design aspects of the TSV and 3D IC integration/packaging. The topics include but not limited to: • 3D IC system design • TSV materials and processes • 3D IC bonding processes (permanent and temporary) • Electrical and thermal design and characterization of 3D IC packages • 3D IC packaging materials and assembly processes • Reliability and structural design of 3D IC packages
Keynote Speakers
Paul D. FRANZON,, North Carolina State University, United States
Liang Choo HSIA, Global Foundries Singapore Pte Ltd, Singapore
Sesh RAMASWAMI, Applied Materials, United States
Bart SWINNEN, IMEC, Belgium
Invited Speakers
Deming CHEN, University of Illinois, Urbana-Champaign,
Bioh KIM, EVG Group,
Kangwook LEE, Tohoku University,
Vasilis PAVLIDIS, École Polytechnique Fédérale de Lausanne,
Juha RANTALA, Silecs International Pte Ltd,
Richard SEAGER, OM Group Ultra Pure Chemical Pte. Ltd,
Sugiya TETSUKAZU, Disco Corporation,
Organised by
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Conference Managed by Meeting Matters International
